simulator lang=spectre

subckt jfrInverter VDD VSS in out
    M0 (out in VSS VSS) NMOS_VTL w=180n l=50n
    M1 (out in VDD VDD) PMOS_VTL w=180n l=50n
ends jfrInverter

V0 (VDD 0) vsource dc=pvdd type=dc
V1 (VSS 0) vsource dc=0.0 type=dc
C0 (out 0) capacitor c=pOutCap
I0 (VDD VSS in out) jfrInverter

VVIN ( in 0 ) vsource type=pulse val0=0 val1=pvdd delay=0 rise=0.01n fall=0.01n width=1n period=2n
